Science route
VLSI and chip design engineer
You design, test or verify the circuits used in electronic chips.
First question
What does this person do?
Work can involve digital logic, circuit design, verification, physical design or semiconductor systems. You use specialised tools, review timing and power constraints, and work with other engineering teams.
These are different specialisms rather than one identical job.
Next question
What are they paid?
LPA = lakhs per annum; ₹1 lakh = ₹100,000. The reviewed primary sources establish this career or related training, but do not measure representative pay for its experience stages. Whole-college medians and isolated high offers are not used as career salary bands.
Evidence checked . Document dates and assumptions are listed below.
-
Entry first role
No reliable figureNot established
No representative earnings figure was established for this stage in the sources reviewed.
Checked: Indraprastha Institute of Information Technology Delhi iiitd.ac.in
-
Mid about 5 years in
No reliable figureNot established
No representative earnings figure was established for this stage in the sources reviewed.
Checked: Indraprastha Institute of Information Technology Delhi iiitd.ac.in
-
Senior about 10 years in
No reliable figureNot established
No representative earnings figure was established for this stage in the sources reviewed.
Checked: Indraprastha Institute of Information Technology Delhi iiitd.ac.in
Scale: ₹ lakhs per annum. These examples are not a salary ceiling or a promise of progression.
No verified career-wide salary progression is available in the sources reviewed. Experience, employer, specialisation and compensation structure can change outcomes.
Hiring landscape
Who hires for this work?
Examples of large employers and institutions associated with this route in India:
- Semiconductor design employers
- Electronics and embedded-systems teams
Examples, not a ranking or a promise of a current vacancy. Hiring changes; check the employer’s own careers page.
What it takes to get in
- Entrance exam
- Course admission and employer selection differ. Check the specific programme and current employer process.
- Realistic cut-off
- Electronics or a closely related engineering curriculum is a useful route. Verify the mathematics/science prerequisites of the degree. Projects in circuits, digital systems and hardware tools matter; some specialist jobs prefer postgraduate study.
- How long
- 4 years
- Roughly what it costs
Not stated as a single figure
Course, living and examination fees vary by institution and recruitment round; no complete current cost was verified. Check the recognised programme and current notice before paying.
Approximate, tuition only, excluding coaching and living costs unless the source text says otherwise.
- Can you switch out later?
- The subject or technical training can transfer to related roles. A new employer may require additional qualifications, examinations or experience.
Delhi entry paths
These are the routes people in Delhi commonly take into this career. This is not a ranking of institutions and does not list cut-offs for any particular college.
- Compare relevant recognised degrees, curricula, total fees and placement denominators before choosing a programme.
- Build practical work and internships for the role; admission or graduation does not guarantee an offer. Delhi study can lead to recruitment elsewhere.
How this compares
Related routes from the same streams, listed alphabetically. Pay bases differ; open a route to read its scope.
Sources
- Indraprastha Institute of Information Technology Delhi iiitd.ac.in
2026-10-12: The 2025–26 brochure describes the Electronics and VLSI Engineering curriculum and FPGA, VLSI and ASIC design roles. It does not publish a VLSI-only pay distribution; college-wide CTC must not be relabelled chip-design pay. Publication day is not printed in the reviewed report; the date field is the check date, not a publication or refresh date. 2026-10-12: No representative earnings figure was established for this stage in the sources reviewed.